QP/C++  7.0.1
Real-Time Embedded Framework
qxk_port.hpp
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1// QP/C++ Real-Time Embedded Framework (RTEF)
2// Copyright (C) 2005 Quantum Leaps, LLC. All rights reserved.
3//
4// SPDX-License-Identifier: GPL-3.0-or-later OR LicenseRef-QL-commercial
5//
6// This software is dual-licensed under the terms of the open source GNU
7// General Public License version 3 (or any later version), or alternatively,
8// under the terms of one of the closed source Quantum Leaps commercial
9// licenses.
10//
11// The terms of the open source GNU General Public License version 3
12// can be found at: <www.gnu.org/licenses/gpl-3.0>
13//
14// The terms of the closed source Quantum Leaps commercial licenses
15// can be found at: <www.state-machine.com/licensing>
16//
17// Redistributions in source code must retain this top-level comment block.
18// Plagiarizing this software to sidestep the license obligations is illegal.
19//
20// Contact information:
21// <www.state-machine.com>
22// <info@state-machine.com>
23//============================================================================
31#ifndef QXK_PORT_HPP
32#define QXK_PORT_HPP
33
34// determination if the code executes in the ISR context
35#define QXK_ISR_CONTEXT_() (QXK_get_IPSR() != 0U)
36
37__attribute__((always_inline))
38static inline uint32_t QXK_get_IPSR(void) {
39 uint32_t regIPSR;
40 __asm volatile ("mrs %0,ipsr" : "=r" (regIPSR));
41 return regIPSR;
42}
43
44// trigger the PendSV exception to pefrom the context switch
45#define QXK_CONTEXT_SWITCH_() \
46 *Q_UINT2PTR_CAST(uint32_t, 0xE000ED04U) = (1U << 28U)
47
48// QXK ISR entry and exit
49#define QXK_ISR_ENTRY() ((void)0)
50
51#define QXK_ISR_EXIT() do { \
52 QF_INT_DISABLE(); \
53 if (QXK_sched_() != 0U) { \
54 QXK_CONTEXT_SWITCH_(); \
55 } \
56 QF_INT_ENABLE(); \
57 QXK_ARM_ERRATUM_838869(); \
58} while (false)
59
60#if (__ARM_ARCH == 6) // ARMv6-M?
61 #define QXK_ARM_ERRATUM_838869() ((void)0)
62#else // Cortex-M3/M4/M7 (v7-M)
63 // The following macro implements the recommended workaround for the
64 // ARM Erratum 838869. Specifically, for Cortex-M3/M4/M7 the DSB
65 // (memory barrier) instruction needs to be added before exiting an ISR.
66 //
67 #define QXK_ARM_ERRATUM_838869() \
68 __asm volatile ("dsb" ::: "memory")
69#endif // ARMv6-M
70
71// Use a given ARM Cortex-M IRQ to return to thread mode (default NMI)
72//
73// NOTE:
74// If you need the NMI for other purposes, you can define the macros
75// QXK_USE_IRQ_NUM and QXK_USE_IRQ_HANDLER to use thus specified IRQ
76// instead of the NMI (the IRQ should not be used for anything else).
77// These two macros can be defined on the command line to the compiler
78// and are actually needed only to compile the qxk_port.c file.
79//
80//#define QXK_USE_IRQ_NUM 25
81//#define QXK_USE_IRQ_HANDLER CRYPTO_IRQHandler
82
83// initialization of the QXK kernel
84#define QXK_INIT() QXK_init()
85extern "C" void QXK_init(void);
86extern "C" void QXK_thread_ret(void);
87
88#include "qxk.hpp" // QXK platform-independent public interface
89
90#endif // QXK_PORT_HPP
91
QXK/C++ preemptive extended (blocking) kernel, platform-independent public interface.
void QXK_thread_ret(void)
__attribute__((always_inline)) static inline uint32_t QXK_get_IPSR(void)
Definition: qxk_port.hpp:37
void QXK_init(void)
Definition: qxk_port.cpp:74