QP/C  7.3.4
Real-Time Embedded Framework
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qs_fp.c
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1//$file${src::qs::qs_fp.c} vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv
2//
3// Model: qpc.qm
4// File: ${src::qs::qs_fp.c}
5//
6// This code has been generated by QM 6.1.1 <www.state-machine.com/qm>.
7// DO NOT EDIT THIS FILE MANUALLY. All your changes will be lost.
8//
9// This code is covered by the following QP license:
10// License # : LicenseRef-QL-dual
11// Issued to : Any user of the QP/C real-time embedded framework
12// Framework(s) : qpc
13// Support ends : 2024-12-31
14// License scope:
15//
16// Copyright (C) 2005 Quantum Leaps, LLC <state-machine.com>.
17//
18// Q u a n t u m L e a P s
19// ------------------------
20// Modern Embedded Software
21//
22// SPDX-License-Identifier: GPL-3.0-or-later OR LicenseRef-QL-commercial
23//
24// This software is dual-licensed under the terms of the open source GNU
25// General Public License version 3 (or any later version), or alternatively,
26// under the terms of one of the closed source Quantum Leaps commercial
27// licenses.
28//
29// The terms of the open source GNU General Public License version 3
30// can be found at: <www.gnu.org/licenses/gpl-3.0>
31//
32// The terms of the closed source Quantum Leaps commercial licenses
33// can be found at: <www.state-machine.com/licensing>
34//
35// Redistributions in source code must retain this top-level comment block.
36// Plagiarizing this software to sidestep the license obligations is illegal.
37//
38// Contact information:
39// <www.state-machine.com/licensing>
40// <info@state-machine.com>
41//
42//$endhead${src::qs::qs_fp.c} ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
43#define QP_IMPL // this is QP implementation
44#include "qs_port.h" // QS port
45#include "qs_pkg.h" // QS package-scope internal interface
46
47//============================================================================
48//! @cond INTERNAL
49
50//! @static @private @memberof QS
51void QS_f32_fmt_(
52 uint8_t const format,
53 float32_t const f)
54{
55 union F32Rep {
56 float32_t f;
57 uint32_t u;
58 } fu32; // the internal binary representation
59 uint8_t chksum = QS_priv_.chksum; // put in a temporary (register)
60 uint8_t * const buf = QS_priv_.buf;
61 QSCtr head = QS_priv_.head;
62 QSCtr const end = QS_priv_.end;
63 uint_fast8_t i;
64
65 fu32.f = f; // assign the binary representation
66
67 QS_priv_.used += 5U; // 5 bytes about to be added
68 QS_INSERT_ESC_BYTE_(format) // insert the format byte
69
70 // insert 4 bytes...
71 for (i = 4U; i != 0U; --i) {
72 QS_INSERT_ESC_BYTE_((uint8_t)fu32.u)
73 fu32.u >>= 8U;
74 }
75
76 QS_priv_.head = head; // save the head
77 QS_priv_.chksum = chksum; // save the checksum
78}
79
80//! @static @private @memberof QS
81void QS_f64_fmt_(
82 uint8_t const format,
83 float64_t const d)
84{
85 union F64Rep {
86 float64_t d;
87 uint32_t u[2];
88 } fu64; // the internal binary representation
89 uint8_t chksum = QS_priv_.chksum;
90 uint8_t * const buf = QS_priv_.buf;
91 QSCtr head = QS_priv_.head;
92 QSCtr const end = QS_priv_.end;
93 uint32_t i;
94
95 // static constant union to detect endianness of the machine
96 static union U32Rep {
97 uint32_t u32;
98 uint8_t u8;
99 } const endian = { 1U };
100
101 fu64.d = d; // assign the binary representation
102
103 // is this a big-endian machine?
104 if (endian.u8 == 0U) {
105 // swap fu64.u[0] <-> fu64.u[1]...
106 i = fu64.u[0];
107 fu64.u[0] = fu64.u[1];
108 fu64.u[1] = i;
109 }
110
111 QS_priv_.used += 9U; // 9 bytes about to be added
112 QS_INSERT_ESC_BYTE_(format) // insert the format byte
113
114 // output 4 bytes from fu64.u[0]...
115 for (i = 4U; i != 0U; --i) {
116 QS_INSERT_ESC_BYTE_((uint8_t)fu64.u[0])
117 fu64.u[0] >>= 8U;
118 }
119
120 // output 4 bytes from fu64.u[1]...
121 for (i = 4U; i != 0U; --i) {
122 QS_INSERT_ESC_BYTE_((uint8_t)fu64.u[1])
123 fu64.u[1] >>= 8U;
124 }
125
126 QS_priv_.head = head; // save the head
127 QS_priv_.chksum = chksum; // save the checksum
128}
129
130//! @endcond
float float32_t
Definition qp.h:112
double float64_t
Definition qp.h:115
QS/C package-scope interface.
Sample QS/C port.