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In this issue:
- Introducing Quantum Platform Nano™ (QP-nano)
- What's included in the QP-nano™ evaluation
- Key Features of QP-nano™
The highest-volume embedded systems shipping in billions of units each year are the low-end 8- and 16-bitters such as 8051's, PICs, HC08s, tinyAVRs, MSP430s, Z80s, and others alike. The question is this: "Can you use UML-style, hierarchical state machines in such systems?"
Up until now, the answer was: "Not really". No current versions of commercial design automation tools or even the standard version of the Quantum Platform (QP), can fit in such small MCUs. The main problem is the RAM. The standard version of QP requires at least a few hundred bytes of RAM for the event pools, event queues, subscriber lists, timer objects, and state machine objects. When you add to it a reasonable stack and data space for your application, you end up with a requirement of at least 1KB of RAM for a minimal meaningful QP project.
But, what if your low-end MCU has 256, or just 128 bytes of RAM?
Introducing Quantum Platform Nano™ (QP-nano)
QP-nano™ is a complete, reusable, event-driven application infrastructure for executing concurrent UML-style hierarchical state machines specifically designed for small 8-bit embedded microcontrollers. The memory footprint of QP-nano is 1 to 1.2KB of ROM and just a few bytes of RAM per state machine, which makes it suitable for parts with only 100+ bytes of RAM and 4+ KB of ROM. By pushing the envelope to such small systems, QP-nano represents a quantum leap in scaling down UML statecharts. This opens completely new markets and possibilities for UML-based designs in this highest volume embedded market segment.
What's included in the QP-nano™ evaluation
The newly released QP-nano™ evaluation kit is now available for download. To demonstrate QP-nano™ on a real-life small 8-bit microcontroller, the evaluation version includes examples for the Silicon Laboratories USB ToolStick, which is available directly from Silicon Labs website and costs just $10.99. The ToolStick combines a USB-debugger and a complete evaluation board for the C8051F300 MCU (8051-based, 256 bytes of RAM, 8KB of ROM, 11 pins).
Key Features of QP-nano™
- Full support for hierarchical state nesting.
- Guaranteed entry/exit action execution on arbitrary state transition topology with up to 4 levels of state nesting.
- Full support of nested initial transitions.
- No RAM required for representing states and transitions-number of states limited only by the code space (ROM).
- Extremely small RAM/ROM footprint. A state machine instance in QP-nano requires only one function pointer and an event in RAM (altogether typically 4 bytes). The hierarchical state machine code takes about 700-900 bytes of code space while the simpler "flat" finite state ma-chine takes only about 60 bytes of code space (ROM). The event-driven framework and scheduler require typically around 500 bytes of ROM and just a few bytes of RAM. Of course, you must also budget some RAM for the C stack.
- Provisions in the code for placing constants in code space (ROM).
- Highly maintainable boilerplate state machine representation in C code that is very easy to modify and extend at any stage of the development cycle.
- Support for events with one scalar parameter, configurable to 0 (no parameter), 8, 16, or 32-bits.
- Support for up to 8 concurrently executing state machines (active objects)
- Build-in deterministic, thread-safe event queue for direct event delivery mechanism with first-in-first-out (FIFO) policy.
- Built-in cooperative, priority-based scheduler for Run-To-Completion (RTC) execution of active objects.
- One single-shot time event (timer) per active object with configurable tick-counter dynamic range: 0 (no timer), 8, 16, or 32-bits
- Idle-time callback for implementing power-saving modes.
- Comprehensive documentation.
- Ports to various compilers available online.
- Application Notes and extensive examples available online
- Royalty-free licensing model and commercial support contracts.
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